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Machine Learning Engineer (NCG 2026)

Astera Labs
San Jose, California, United StatesPosted today
Location
San Jose, California, United States
Salary
$140,000 - $160,000/year

AI/ML Engineer - Silicon Development Automation

About Astera Labs

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements.

Position Overview

We are seeking an AI/ML Engineer to design and implement AI-enabled workflows that accelerate silicon development processes across the chip design lifecycle. You will apply deep learning and generative AI techniques to optimize EDA (Electronic Design Automation) workflows, spanning frontend design through backend physical design and Design-for-Test (DFT) implementation.

Key Responsibilities

Workflow Development & Optimization

  • Develop AI-enabled automation solutions for frontend and backend silicon development domains including circuit design, design verification, formal verification, static code analysis, debugging, or for backend physical design workflows.
  • Contribute to agentic workflows that coordinate silicon development tasks

AI/ML Model Development

  • Implement Generative AI systems using Context Engineering, Retrieval-Augmented Generation (RAG) and Agentic techniques to integrate domain-specific EDA tooling with LLM capabilities
  • Apply context engineering techniques to encode chip design constraints and specifications into model inputs
  • Participate in building evaluation suites and internally relevant benchmark data for silicon development AI applications

Technical Implementation

  • Write production Python and C++ code for AI inference and training pipelines
  • Build data pipelines for processing design databases, netlists, and verification artifacts
  • Develop evaluation frameworks with domain-specific metrics for design quality and convergence

Required Qualifications

Education & Background

  • Bachelor's or Master's degree in Computer Science, Electrical Engineering, or related field
  • Documented evidence of deep learning, generative AI, or chip design/verification expertise through one of: published papers, thesis work, GitHub repositories, or research projects

Technical Proficiency

  • Strong Python programming for ML development and data processing
  • Solid C++ programming skills
  • Familiarity with optimization algorithms and their applications
  • Hands-on work with RAG systems or agentic AI workflows

Domain Knowledge

  • Working knowledge of VLSI design flows, chip design, or verification methodologies
  • Understanding of EDA tools and design automation concepts

Preferred Qualifications

  • Hands-on experience with PyTorch and deep learning frameworks
  • Contributions to open-source EDA tools or design automation projects
  • Prior coursework or projects in EDA or silicon development related activities
  • Experience with model evaluation frameworks and AI development best practices

Technical Competencies

  • Python ML Development
  • C++ Programming
  • VLSI/Silicon Design Fundamentals
  • Generative AI Applications
  • RAG & Context Engineering Basics
  • Optimization Algorithm Implementation

Compensation

The base salary range for this role is between $140,000 - $160,000

Diversity & Inclusion

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

About Astera Labs

Astera Labs is a fabless semiconductor company that designs semiconductor-based connectivity solutions for AI and cloud data center infrastructure. Its Intelligent Connectivity Platform integrates technologies such as CXL, Ethernet, NVLink, PCIe, and UALink with its COSMOS software suite to provide scale-up and scale-out connectivity, and it offers a custom connectivity solutions business alongside its standards-based portfolio. The company trades on the Nasdaq under the ticker ALAB.

Industry
Semiconductors (fabless semiconductor / semiconductor manufacturing)
Head office
Santa Clara, California, USA
Company size
201-500 employees (per company LinkedIn)
Founded
2017
Semiconductor-based connectivity solutionsRack-scale AI infrastructurePCIeCXLEthernetSmart DSP retimersSmart fabric switchesCXL smart memory controllersConnectivity management software (COSMOS)Data center connectivity
View Astera Labs’s profile →

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